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september 2013 doc id 15476 rev 12 1/23 1 L5300AH7 5 v low drop voltage regulator features operating dc supply voltage range 5.6 v to 40 v low dropout voltage 300 ma current capability low quiescent current very low consumption mode precision output voltage 5 v +/-2% reset circuit sensing the output voltage programmable reset pulse delay with external capacitor thermal shutdown and short circuit protection wide temperature range (t j = -40c to 150c) enable input for enabling / disabling the voltage regulator description L5300AH7 is a low dropout linear regulator with microprocessor control functions such as power on reset, low voltage reset, on/off control. in addition, only low value ceramic capacitor is required for stability (above or equal 220 nf). typical quiescent current is 60 a at output current equal to 0 and enable high. it drops to 10 a in ?not enabled? mode. on chip trimming results in high output voltage accuracy (2%). accuracy is kept over wide temperature range, line and load variation. the maximum input voltage is 40 v. the max output current is internally limited. internal temperature protection disables the voltage regulator output. max dc supply voltage v s 40 v max output voltage tolerance v 0 +/-2 % max dropout voltage v dp 500 mv output current i 0 300 ma quiescent current i qn 5a (1) 55 a (2) 1. typical value with regulator disabled 2. typical value with regulator enabled hpak ga p gcft00135 table 1. device summary package order codes tube tape and reel hpak L5300AH7 L5300AH7tr www.st.com
contents L5300AH7 2/23 doc id 15476 rev 12 contents 1 block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.3 enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 package and pc board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 hpak thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2 hpak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
L5300AH7 list of tables doc id 15476 rev 12 3/23 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 9. hpak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 10. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
list of figures L5300AH7 4/23 doc id 15476 rev 12 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. output voltage vs t j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4. output voltage vs v s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. output voltage vs v en . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 6. drop voltage vs output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 7. current consumption vs output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0 figure 8. current consumption vs output current (at light load condition) . . . . . . . . . . . . . . . . . . . . . 10 figure 9. current consumption vs input voltage (i o = 0.1 ma) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 10. current consumption vs input voltage (i o = 100 ma) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 11. current limitation vs t j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 12. current limitation vs input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 13. short-circuit current vs t j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 14. short-circuit current vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 15. v en_high vs t j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 16. v en_low vs t j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 17. v rhth vs t j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 18. v rlth vs t j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 19. i cr vs t j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 20. i dr vs t j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 21. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 22. stability region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 23. maximum load variation response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 24. reset time diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 25. pc board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 26. rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 16 figure 27. hpak thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 28. thermal fitting model of a single-channel hsd in hpak . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 29. hpak dimension. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
L5300AH7 block diagram and pins description doc id 15476 rev 12 5/23 1 block diagram and pins description figure 1. block diagram figure 2. configuration diagram (top view) 9 v 9r 67$5783 9rowdjh 5hihuhqfh /rz9rowdjh 5hvhw 5hv 9 fu &xuuhqw /lplwhu 3rzhu 'ulyhu 7khupdo 6kxwgrzq *$3*&)7 ( q jqg p9 *$3*&)7
block diagram and pins description L5300AH7 6/23 doc id 15476 rev 12 table 2. pins description n name function 1v s supply voltage, block directly to gnd on the i c with a capacitor. 2e n enable input. a high signal switches the regulator on. connect to v s if not needed. 3r es reset output. internally connected to v o through a 20 k pull up resistor. this pin is pulled low when v o L5300AH7 electrical specifications doc id 15476 rev 12 7/23 2 electrical specifications 2.1 absolute maximum ratings stressing the device above the rating listed in table 3: absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2.2 thermal data m table 3. absolute maximum ratings symbol parameter value unit v sdc dc supply voltage -0.3 to 40 v i sdc input current internally limited v odc dc output voltage -0.3 to 6 v i odc dc output current internally limited v od res open drain output voltage r es -0.3 to v vodc + 0.3 v i od res open drain output current r es internally limited v cr v cr voltage -0.3 to v vo + 0.3 v v en enable input -0.3 to 40 v t j junction temperature -40 to 150 c v esd hbm esd hbm voltage level (hbm-mil std 883c) +/- 2 kv v esd cdm esd cdm voltage level (cdm aec-q100-011) +/- 750 v table 4. thermal data symbol parameter value unit r thj-case thermal resistance junction to case 4.8 c/w r thj-amb thermal resistance junction to ambient 45 (1) 1. the values quoted are for pcb 77 mm x 86 mm x 1.6 mm, fr4, double layer with thermal vias (one copper heatsink layer, thickness 0.070 mm, area 8 cm 2 ). k/w
electrical specifications L5300AH7 8/23 doc id 15476 rev 12 2.3 electrical characteristics values specified in this section are for v s = 5.6 v to 31 v, t j = -40 c to 150 c, unless otherwise stated. table 5. general pin symbol parameter test condition min typ max unit v o v o_ref output voltage v s = 8 to 18 v i o = 8 to 300 ma 4.9 5.0 5.1 v v o v o_ref output voltage v s = 5.6 to 31 v i o = 8 to 300 ma 4.85 5.0 5.15 v v o v o_ref output voltage v s = 5.6 to 31 v i o = 0.1ma to 8ma 4.75 5.0 5.25 v v o i short short circuit current v s = 13.5 v 0.8 1.8 2.6 a v o i lim output current limitation (1) 1. measured output current when the output voltage has dropped 100 mv from its nominal value obtained at 13.5 v and i o = 75 ma. v s = 13.5 v 0.6 1.6 2.5 a v s , v o v line line regulation voltage v s = 6 v to 28 v i o = 50 ma 40 mv v o v load load regulation voltage v s = 13.5 v i o = 8 ma to 300 ma t j =25c 40 mv v s = 8 v to 18 v i o = 8 ma to 300 ma 55 mv v s , v o v dp drop voltage (2) i o = 300 ma 500 mv v s , v o svr ripple rejection f r = 100 hz (3) 60 db v o i oth_h normal consumption mode output current 8ma v o i oth_l very low consumption mode output current 1.1 ma v o i oth_hyst output current switching threshold hysteresis v s = 13.5 v, t j = 25 c 0.8 ma v s , v o i qs current consumption with regulator disabled i qs = i v s ? i o v s = 13.5 v, e n = low 510a v s , v o i qn_1 current consumption with regulator enabled i qn_1 = i v s ? i o v s = 13.5 v, i o < 1 ma, e n = high 55 80 a v s , v o i qn_300 current consumption with regulator enabled i qn_300 = i v s ? i o v s = 13.5 v, i o = 300 ma, e n = high 34.2ma ?t w thermal protection temperature 150 190 c ?t w_hy thermal protection temperature hysteresis 10 c
L5300AH7 electrical specifications doc id 15476 rev 12 9/23 2. v s - v o measured dropout when the output voltage has dr opped 100 mv from its nominal value obtained at 13.5 v and i o = 75 ma. 3. guaranteed by design table 6. reset pin symbol parameter test condition min typ max unit r es v res_l reset output low voltage r ext = 5 k v o > 1 v 0.4 v r es i res_lkg reset output high leakage current v res =v o 1a r es r res pull up internal resistance versus v o 10 20 40 k r es v o_th v o out of regulation threshold v o decreasing 6% 8% 10% below v o_ref v cr v rlth reset timing low threshold v s = 13.5 v 16% 19% 22% v o_ref v cr v rhth reset timing high threshold v s =13.5 v 47% 50% 53% v o_ref v cr i cr charge current v s = 13.5 v 10 20 30 a v cr i dr discharge current v s = 13.5 v 10 20 30 a r es t rr reset reaction time v o =v o_th - 100 mv 2 s r es t rd reset delay time v s = 13.5 v, c tr = 1 nf 246ms table 7. enable pin symbol parameter test condition min. typ. max. unit e n v en_low e n input low voltage 1 v e n v en_high e n input high voltage 3 v e n v en_hyst e n input hysteresis 500 mv e n i _leak pull down current v en =5v 3 10 a
electrical specifications L5300AH7 10/23 doc id 15476 rev 12 2.4 electrical characteristics curves figure 3. output voltage vs t j figure 4. output voltage vs v s figure 5. output voltage vs v en figure 6. drop voltage vs output current figure 7. current consumption vs output current figure 8. current consumption vs output current (at light load condition) 9rbuhi9 7m?& 9v 9 ,r p$ *$3*&)7 9rbuhi9 9v9 7f ?& ,r p$ *$3*&)7 *$3*&)7 *$3*&)7 9gs9 ,rp$ 7l ?& 7l ?& *$3*&)7 ,tqp$ ,rp$ 9v 9 (q +ljk 7m ?& *$3*&)7
L5300AH7 electrical specifications doc id 15476 rev 12 11/23 figure 9. current consumption vs input voltage (i o = 0.1 ma) figure 10. current consumption vs input voltage (i o = 100 ma) figure 11. current limitation vs t j figure 12. current limitation vs input voltage figure 13. short-circuit current vs t j figure 14. short-circuit current vs input voltage *$3*&)7 ,tq?$ ,rp$ (q +ljk 7m ?& *$3*&)7 ,tqp$ ,rp$ (q +ljk 7m ?& *$3*&)7 ,olpp$ 7m?& 9v 9 *$3*&)7 ,olpp$ 9v9 7m ?& 7m ?& *$3*&)7 ,vkruwp$ 7m?& 9v 9 *$3*&)7 ,vkruwp$ 7m ?& 9v9 7m ?&
electrical specifications L5300AH7 12/23 doc id 15476 rev 12 figure 15. v en_high vs t j figure 16. v en_low vs t j figure 17. v rhth vs t j figure 18. v rlth vs t j figure 19. i cr vs t j figure 20. i dr vs t j *$3*&)7 9hqbkljk9 7m?& 9v 9wr9 *$3*&)7 9hqborz9 7m?& 9v 9wr9 *$3*&)7 9ukwk9rbuhi 7m?& 9v 9wr9 *$3*&)7 9uowk9rbuhi 7m?& 9v 9wr9 *$3*&)7 ,fu?$ 7m?& 9v 9wr9 *$3*&)7 ,gu?$ 7m?& 9v 9wr9
L5300AH7 application information doc id 15476 rev 12 13/23 3 application information 3.1 voltage regulator the voltage regulator uses a p-channel mos transistor as a regulating element. with this structure a very low dropout voltage at current up to 300 ma is obtained. the output voltage is regulated up to input supply voltage of 40 v. the high-precision of the output voltage (2%) is obtained with a pre-trimmed reference voltage. the voltage regulator automatically adapts its own quiescent current to the output current level. in light load conditions the quiescent current goes down to 55 a only (low consumption mode). this procedure features a certain hysteresis on the output current (see figure 8 ). short-circuit protection to gnd and a thermal shutdown are provided. figure 21. application schematic the input capacitor c 1 100 f is necessary as backup supply for negative pulses which may occur on the line. the second input capacitor c 2 220 nf is needed when the c 1 is too distant from the v s pin and it compensates smooth line disturbances. the c 0 ceramic capacitor, connected to the output pin, is for bypassing to gnd the high-frequency noise and it guarantees stability even during sudden line and load variations. suggested value is c 0 =220nf ? with esr 100 m . stability region is reported in figure 22 . &r 9 %$77 /$+ 567 9fu 9v *1' (q 9r & & *$3*&)7
application information L5300AH7 14/23 doc id 15476 rev 12 figure 22. stability region figure 23. maximum load variation response (652kp &r?) (65plq 67$%,/,7<5(*,21 817(67('5(*,21 *$3*36 note: the curve which describes the minimum esr is derived from characterization data on the regulator with connected ceramic capacitors which feature low esr values (at 100 khz). any capaci tor with further lower esr than the given plot value must be evaluated in each and every case. v o = 50 mv/div i o = 100 ma/div v s =13.5v i o = 8 to 300 ma t c =25c c o = 220 nf gapgc ft00128
L5300AH7 application information doc id 15476 rev 12 15/23 3.2 reset the reset circuit monitors the output voltage v o . if the output voltage becomes lower than v o_th then r es goes low with a delay time (t rr ). when the output voltage becomes higher than v o_th then r es goes high with a delay time t rd . this delay is obtained by 512 periods of oscillator. the oscillator period is given by: equation 1 t osc = [( v rhth - v rlth ) x c tr ] / i cr + [( v rhth - v rlth ) x c tr ] / i dr and reset pulse delay t rd is given by: equation 2 t rd = 32 x t osc where: i cr = 20 a is an internally generated charge current, i dr = 20 a is an internally generated discharge current, v rhth = 2.5v (typ) and v rlth = 0.95v (typ) are two voltage thresholds, c tr is an external capacitor put between v cr pin and gnd. figure 24. reset time diagram 3.3 enable L5300AH7 is also provided by an enable input, a high signal switches the regulator on. in standby mode the output is disabled and the current consumption of the device (quiescent current) is less than 10 a. 9 r 9 fu 5 hv w uu w uu w ug 7 rvf 9 rxwbwo 9 ukwk 9 uowk *$3*&)7
package and pc board thermal data L5300AH7 16/23 doc id 15476 rev 12 4 package and pc board thermal data 4.1 hpak thermal data figure 25. pc board figure 26. r thj-amb vs pcb copper area in open box free air condition *$3*&)7 note: layout condition of r th and z th measurements (board finish thickness 1.6 mm +/- 10 %; board double layer; board dimension 78 mm x 86 mm; board material fr4; cu thickness 0.070 mm (front and back side); thermal vias separation 1.2 mm; thermal via diameter 0.3 mm +/- 0.08 mm; cu thickness on vias 0.025 mm; footprint dimension 6.4 mm x 7 mm). 30 40 50 60 70 80 90 0246810 rthjamb rthjamb gapgcft0 0131
L5300AH7 package and pc board thermal data doc id 15476 rev 12 17/23 figure 27. hpak thermal impedanc e junction ambient single pulse figure 28. thermal fitting model of a single-channel hsd in hpak 1 10 100 0.01 0.1 1 10 100 1000 zth (c/w) time (s) cu=8 cm2 cu=2 cm2 cu=foot print gapgcft00132 gapgcft 00133 note: the fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
package and pc board thermal data L5300AH7 18/23 doc id 15476 rev 12 equation 3: pulse calculation formula where = t p /t table 8. thermal parameter area/island (cm 2 )footprint48 r1 (c/w) 3 r2 (c/w) 4 r3 (c/w) 6 r4 (c/w) 7 r5 (c/w) 28 18.5 11 r6 (c/w) 31 22 14 c1 (w.s/c) 0.0005 c2 (w.s/c) 0.001 c3 (w.s/c) 0.005 c4 (w.s/c) 0.05 c5 (w.s/c) 0.8 2 3 c6 (w.s/c) 3 6 9 z th r th z thtp 1 ? () + ? =
L5300AH7 package and packing information doc id 15476 rev 12 19/23 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 hpak mechanical data figure 29. hpak dimension gapgcft00134
package and packing information L5300AH7 20/23 doc id 15476 rev 12 table 9. hpak mechanical data dim millimeter nom min max a2.202.40 a1 0.90 1.10 a1 0.03 0.23 b0.450.60 b4 5.20 5.40 c0.450.60 c2 0.48 0.60 d6.006.20 d1 5.10 e6.406.60 e1 5.20 e0.85 e1 1.60 1.80 e2 3.30 3.50 e3 5.00 5.20 h9.3510.10 l1 (l1) 2.80 l2 0.80 l4 0.60 1.00 r0.20 v2 0 8
L5300AH7 revision history doc id 15476 rev 12 21/23 6 revision history table 10. document revision history date revision changes 09-aug-2007 1 initial release. 15-oct-2007 2 changed features table on the cover page: - quiescent current with regulator disabled changed from 10 to 5 a. - quiescent current with regulator enabled changed from 60 to 55 a. table 5: general - added typical value of i qs and i qn_1 parameters. 12-mar-2009 3 changed features table on the cover page table 5: general ?v o_ref : deleted row and added 3 new rows table 6: reset ?i res_lkg : deleted test condition ?v o_th : deleted i o = 1 to 300 ma and v s = 5.6 to 31v, added ?v o decreasing? for test condition ?v rlth : changed min/typ/max values ?t rd : changed min/typ/max values updated table 7: enable section 3.2: reset ? t rd : changed coefficient ?v rlth : changed coefficient 23-jul-2010 4 changed status from target specification to preliminary data. updated following tables: ? table 4: thermal data ? table 5: general added section 2.4: electrical characteristics curves . added chapter 4: package and pc board thermal data 02-sep-2010 5 updated figure 27: hpak thermal impedance junction ambient single pulse 15-sep-2010 6 updated table 4: thermal data 12-oct-2010 7 updated section 3.1: voltage regulator
revision history L5300AH7 22/23 doc id 15476 rev 12 09-mar-2011 8 updated following tables: table 2: pins description : ? updated pins sequence table 3: absolute maximum ratings : ?i sdc : changed symbol from i vsdc ?i odc : changed symbol from i vodc table 5: general : ?i short : changed min/typ/max value ?i lim : changed min/typ/max value, changed parameter ?v line : changed test condition ?i qn_300 : changed typ value ? updated tablefootnote table 6: reset : ?v res_l : changed test condition ?v res_lkg : added test condition table 7: enable : ?i leak : changed typ value updated section 3.2: reset 18-nov-2011 9 table 9: hpak mechanical data : ? b: updated values 26-jan-2012 10 updated figure 22: stability region on page 14 . 07-feb-2012 11 modified figure 22: stability region on page 14 . 13-sep-2013 12 updated disclaimer. table 10. document revision history (continued) date revision changes
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